>VALUE >NAME >NAME >NAME <b>Small Outline Package</b> Fits JEDEC packages (narrow SOIC-8) >VALUE >NAME >NAME <b>Small Outline package</b> 150 mil >VALUE >NAME <b>Small Outline Package</b> .300 SIOC<p> Source: http://www.maxim-ic.com/cgi-bin/packages?pkg=16%2FSOIC%2E300&Type=Max >VALUE >NAME >VALUE >NAME <b>Shrink Small Outline Package</b><p> package type SS >NAME >VALUE >NAME >VALUE >NAME >VALUE X Y Z <h3>QFN 32-Pin package w/ Thermal Pad</h3> <b>***Unproven***</b> <br><br> <B>Applicable Parts:</b> <ul><li>TLC5940</ul> >Name >Value >NAME >VALUE >NAME >VALUE >Name >Value <b>SOT-223</b> >NAME >VALUE <b>8-Lead Thin Shrink Small Outline Package </b><p> Source: http://www.analog.com/static/imported-files/data_sheets/AD8541_8542_8544.pdf >NAME >VALUE <b>14-Lead Thin Shrink Small Outline Package [TSSOP]</b><p> Source: Analog Devices .. 780914713ADD8704_0.pdf >NAME >VALUE <b>16-Lead Thin Shrink Small Outline Package</b> [TSSOP] (RU-16)<p> Source: 8x ADG1408_1409.pdf >NAME >VALUE <b>24-Lead Thin Shrink Small Outline Package TSSOP</b> (RU-24)<p> Source: http://www.analog.com/UploadedFiles/Data_Sheets/39677768AD7714_c.pdf >NAME >VALUE <b>28-Lead TSSOP Package</b><p> RU-28 >NAME >VALUE <b>38-Lead Thin Shrink Small Outline Package</b> [TSSOP] RU-38<p> Source: http://www.analog.com/UploadedFiles/Packages/415413609854197792024125RU38.pdf<br> COMPLIANT TO JEDEC STANDARDS MS-153BD-1 >NAME >VALUE